Boundary Scan Solutions
Test coverage where physical access has run out.
When You Cannot Get a Probe On It
Boards keep getting denser. Fine-pitch BGAs hide their connections underneath the package, test pads get designed out to save area, and double-sided assembly closes off whatever access was left. At some point the limiting factor on test coverage stops being the tester and becomes the board itself.
Boundary scan gets round that by using access the board already has. On an IEEE 1149.1 compliant design, the JTAG chain built into the devices becomes the route in — letting you drive and observe nets that no probe could ever reach, and delivering comprehensive fault coverage on complex, high-density PCBs without the need for traditional bed-of-nails fixturing.
We help you establish that capability in-house using XJTAG, so the tests belong to your engineering team rather than arriving from outside:
- IEEE 1149.1 compliant boundary scan for complex, high-density assemblies
- Coverage of nets with no physical probe access, including fine-pitch BGA
- Fault detection for opens, shorts and stuck-at conditions between scan-capable devices
- XJTAG tooling, with support in getting your team productive on it
- Works alongside flying probe ICT and functional test rather than replacing them
The return builds over time. Once the netlist is in and the tests are written, they re-run against every revision of the board for very little further effort — which is exactly the opposite of a fixture, where each revision means new tooling.
It is worth thinking about early, though. How much a boundary scan test can see depends on choices made at design stage — how devices are chained, whether the chain is accessible, what is connected to what. Involving test before layout is frozen costs nothing and materially changes the coverage you end up with.
If you have a requirement we have not come across before, we will work through it with you to identify the right approach rather than force it into an existing one.
Call us to discuss your needs and leverage our understanding of test.
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